<< Click to Display Table of Contents >> Navigation: AutoTRAX PCB Design Express (DEX) > Designs > Circuit Simulation > The Spice Reference Manual > Circuit Description > Circuit Elements and Models > Transistors and Diodes > JFET Models (NJF/PJF) 
The JFET model is derived from the FET model of Shichman and Hodges. The dc characteristics are defined by the parameters VTO and BETA, which determine the variation of drain current with gate voltage, LAMBDA, which determines the output conductance, and IS, the saturation current of the two gate junctions. Two ohmic resistances, RD and RS, are included. Charge storage is modeled by nonlinear depletion layer capacitances for both gate junctions which vary as the 1/2 power of junction voltage and are defined by the parameters CGS, CGD, and PB.
Note that in Spice3f and later, a fitting parameter B has been added.
name 
parameter 
units 
default 
example 
area 
VTO 
threshold voltage (VT0) 
V 
2.0 
2.0 

BETA 
transconductance parameter (Beta) 
A/V2 
1.0e4 
1.0e3 
* 
LAMBDA 
channellength modulation parameter ( ) 
1/V 
0 
1.0e4 

RD 
drain ohmic resistance 
Ohm 
0 
100 
* 
RS 
source ohmic resistance 
Ohm 
0 
100 
* 
CGS 
zerobias GS junction capacitance (Cgs) 
F 
0 
5pF 
* 
CGD 
zerobias GD junction capacitance (Cgs) 
F 
0 
1pF 
* 
PB 
gate junction potential 
V 
1 
0.6 

IS 
gate junction saturation current (IS) 
A 
1.0e14 
1.0E14 
* 
B 
doping tail parameter 
 
1 


KF 
flicker noise coefficient 
 
0 


AF 
flicker noise exponent 
 
1 


FC 
coefficient for forwardbias 
 
0.5 


TNOM 
parameter measurement temperature 
ºC 

50 
